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Test Coupon

Gigafirm TEST Coupon "GT"
2013
No.
 ADS analysis for high frequency board & HI-SPEED FPGA Board development.
  -The test coupon for every subject is created and verified.
 STATUS
 GT-1

  -Single End Via analysis.
  -MEGTRON-6  Layer-4 t=1.6mm SMA-SMA
2013.4
completion 
 GT-2   -Single End Via analysis.
  -MEGTRON-6  Layer-4 t=1.6mm SMA-SMA
2013.4
completion 
 GT-3  -Single End Via analysis.  
  -MEGTRON-6 Layer-8 t=1.6mm  SAMTEC-CCH
2013.4
completion 
 GT-4  -Differential  TEST (GSSG) 
  -PANASONIC R-1566 Layer-4 t=1.6 
2013.6.7
completion 

GT-4 TEST Coupon
At the time of the FPGA board development which equips high-speed wiring, Test coupon is designed by the same Substrate and a wiring configuration. 
GT4 is imitating the conditions of PCI express. It is applicable to FPGA, SFP+, SATA, SAS, CLOCK, LVDS, and LVPECL. AMF2013 session. 


GT4 GSSG VIA Measurement

E5071C TDR measurement result .Single end   Coaxial structure VIA . differential wiring GSSG impedance matching 


GT4 coupon 100ohm GSSG VIA CONTROL
GT4 / OKI TANAKA PCB design / BD 

GT4 ADS MORMENTUM 
GT4 / ADS MOMENTUM / TRANGENT

GT-3 TEST Coupon
AMF2013 GT3 TEST COUPON BULLSEYE

GT3 TEST-Coupon No.1 L1-L8-L8-L1


GT3 TEST-Coupon PCB


GT3 TEST-Coupon SMA CABLE & TEST POINT



ADS LAYOUT  GT3 Stripline L1--L8-L8-L1


VIA Model  



GT3 Stripline L1--L8-L8-L1  S-Parameter (ADS)




 
Stripline L1--L8-L8-L1  10 Gpbps Eye Pattern(ADS)    MicroStripline L1--L3-L3-L1 10 Gpbps Eye Pattern(ADS)


GT-2 TEST
-GT1-KAIZEN Improvement design 
GT2 TEST COUPON SINGLEEND VIA


GT-1 TEST
 -A SMA connector is used for FPGA SerialIO, CLK, ADC, and DAC on a substrate. 
 -The composition of Single End VIA was analyzed.


 -Substrate   Layer composition 


 -layout image
-An analysis result is next time. 

Gigafirm Research and development

From the developer viewpoint, the simulation of the subject which was a question is carried out, and the test coupon is created and verified. The contents will be exhibited from now on.
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